High Performance ARINC 429 Interface to PCIe

In virtually all modern PCs the PCIe bus serves as the primary motherboard-level interconnect, connecting the host system processor with both integrated-peripherals (surface mounted ICs) and add-on peripherals (expansion cards). In most of these systems, the PCIe bus co-exists with one or more legacy PCI buses, for backward compatibility with the large body of conventional PCI peripherals.

  • up to 12 ARINC 429 channels (4Tx/8Rx) per card
  • 4 Discrete functional pull-down outputs
  • Separate Receivers for monitoring Transmit driver outputs
  • Support for periodic and asynchronous messages
  • Advanced scheduling options
  • Error detection and injection
  • Time-stamping and Timer Synchronisation
  • Lightning protection
  • Extended Temperature Range
  • Multi-application (max 10 simultaneous applications)

mbs’ ÆSyBus 429-PCIe Interface card was designed to support modern PC architectures in which ARINC 429 data has to be processed. The Interface card is compliant with PCI Express™ Base Specification Revision 1.1, and provides simultaneous bi-directional data transfer at 2.5 GHz signal rate with an x1 link width.


ÆSyBus 429-PCIe Interface cards have up to 4 Transmit and 8 Receive channels in a compact x1 slot form factor featuring all performance and compatibility advantages that PCI Express (PCIe) offers over conventional IO extensions.
According to need, the user can select between two methods for transmitting ARINC 429 data.

  • Dedicated FIFOs which are ideally suited for asynchronous transmissions, needed for file transfer applications, like data loading. Each FIFO buffers up to 1k ARINC 429 words, which are transmitted as soon as an opportunity occurs with a minimum allowable gap between words.

  • Transmit Scheduler and Data Buffer, designed for periodic transmissions. This allows up to 128 individually assigned ARINC 429 words to be scheduled on to each of the 4 transmit channels with repetition rates from 10 ms to 4 seconds. Data is drawn from user assigned locations within the Transmit Data Buffer.

Asynchronous and periodic transmissions mix naturally on to the buses with periodic transmissions taking priority. 

All ARINC 429 Receive channels feature Error Detection. Cyclic data buffers are provided for storing Receive data for each channel, prior to it being automatically transferred to applications on the host computers together with the appropriate Write Pointers. The Read Pointers are individually maintained by each application so that multiple applications can independently access the same receive data and timestamps. This would not be possible if FIFOs were used, since FIFOs can only be read once before the data disappears.

Receive data is Time-Stamped with a 32-bit counter and a microsecond resolution. The counter can also be read directly and its value transferred to
host applications with other data.

Discrete Output

The module provides four discrete functional multi-purpose pull-down outputs compatible with the type used in aircraft for signalling 28V/open/GND to an LRU.

PCI Express

PCIe is based on point-to-point topology, with separate serial links connecting every device to the root complex (host). Due to its shared bus topology, access to the older PCI bus is arbitrated (in the case of multiple masters), and limited to one master at a time, in a single direction. Furthermore, the older PCI‘s clocking
scheme limits the bus clock to the slowest peripheral on the bus (regardless of the devices involved in the bus transaction). In contrast, a PCIe bus link supports full-duplex communication between any two endpoints, with no inherent limitation on concurrent access across multiple endpoints. The high-speed serial PCIe V1.1 x1 communication allows for data rates of up to 250 MB/s which is far from being a limiting rate for the traditional ARINC 429 bus (max. 100 kBps).


The ÆSyBus 429-PCIe provides a multiple application interface allowing separate applications to simultaneously access the device, send messages and receive data. It comes with many example software applications in source code which can either be used directly or used as a basis for developing customised software to meet the exact project requirements. 

The ÆSyBus 429-PCIe is also supported by Bus Analyser software providing a powerful, feature rich, test and simulation facility which can be used on its own, or together with one’s own software applications tailored to the particular needs of the project. This capability is made possible by the unique multi-application feature of the ÆSyBus 429-PCIe interface.

Functional Specifications

PCIe Features

  • PCI Express Revision V1.1

  • PCI Express x1 for any backplane slot up to x16

Discrete Output Features

  • 4 Discrete functional Pull-down outputs


  • Lightning Protection

  • -40°C to +80°C Operation

ARINC 429 Transmit Features

  • 2 or 4 Transmit Channels

  • Transmit speed select 12.5 k or 100 k bits/s

  • Transmit Error insertion

  • Transmit FIFOs for asynchronous transmission

  • Transmit Scheduling

  • Built-In Transmit Driver Loopback

ARINC 429 Receive Features

  • 4 or 8 Receive channels

  • Receive Error reporting

  • Time Stamping of all Receive Data

  • Cyclic buffers for receive data and Time Stamps

  • User configurable data transfer scheduling to host applications,

  • periodically and/or when necessary.


Figure 1: Functional block diagram of the ÆSyBus 429-PCIe.



Sales Reference

4 Transmit 8 Receive
ARINC 429 PCIe card with
4 multi-purpose Discrete Outputs     


2 Transmit 4 Receive
ARINC 429 PCIe card with
4 multi-purpose Discrete Outputs 


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